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MESI & MOESI

MESI adds a fourth state to MSI:

StateMeaningDirty?Shared?
M (Modified)Only copy, modifiedYesNo
E (Exclusive)Only copy, cleanNoNo
S (Shared)Clean, others may have copiesNoYes
I (Invalid)Not valid

When Core 0 reads a line and no other cache has it:

  • MSI: goes to S → later write requires BusUpgr (bus transaction)
  • MESI: goes to E → later write just transitions E→M silently (no bus transaction!)

This silent upgrade is a major performance win because many programs read data before writing it, and often only one core accesses a given line.

On a BusRd, the bus has a SHARED signal. If any other cache asserts SHARED (they also have the line), the requesting cache goes to S. If nobody asserts SHARED, it goes to E.

Click Read/Write on each core to see MSI and MESI state transitions in action. Watch how the states change and how they coordinate:

Core 0
I
Invalid
Core 1
I
Invalid
Memory[A] = 42
States: M=Modified, S=Shared, I=Invalid
System initialized. Memory[A] = 42

MOESI adds a fifth state:

StateMeaning
O (Owned)This cache has the authoritative copy, but others have S copies. Memory is stale.

In MESI, when Core 0 has a line in M and Core 1 reads it:

  1. Core 0 flushes the dirty data to memory (expensive write)
  2. Both caches go to S

In MOESI:

  1. Core 0 supplies the data directly to Core 1 (cache-to-cache transfer)
  2. Core 0 goes to O (responsible for the data), Core 1 goes to S
  3. Memory is not updated — saved a memory write!

The O state means “I’m the owner; if anyone needs this data, I’ll supply it. Memory is stale.”

StateOnly copy?Dirty?Responsible for writeback?
MYesYesYes (on eviction)
ONo (others in S)YesYes (on eviction)
EYesNoNo
SNoNoNo
I
ProtocolUsed by
MESIIntel (with extensions), many embedded
MOESIAMD (with extensions)
MESIFIntel server (F = Forward, similar role to O)

All real implementations add vendor-specific extensions, but the core state machine is recognizable from these standard protocols.